The present invention relates to improved means and methods for accessing data from a memory in a digital data processing system. More particularly, the present invention relates to memory accessing apparatus of the type employing one or more cache memories.
As is well known, a cache memory (cache) is a small, relatively fast access memory which is interposed between a larger, relatively slow access memory to improve effective data transfer rates. Typically, a cache implementation is such that its existence is essentially hidden and appears transparent to the user. Also, a cache typically provides for automatically removing old data in order to accommodate new, more likely to be used data when the cache is full. This removal of data may, for example, be on the basis of removing the least recently used data in the cache.
In a typical data processing system, a plurality of memory modules are provided for accessing by a plurality of requestors. A requestor, for example, may be a processor. Such a system is typically constructed and arranged so that a particular dedicated memory module (local memory module) is provided for use by each requestor, while one or more additional memory modules (shared memory modules) are provided for shared use by a plurality of requestors. Each requestor is typically provided with a cache for use with its local memory module for speeding up the accessing of data therefrom. However, these caches are not used for accessing the shared memory modules, since, when a memory is shared by more than one requestor, it is possible that a requestor will write different data into an address which is the same as an address of data currently stored in the cache of a different requestor, thereby destroying that cache's integrity relative to the shared memory. It will be understood that such a situation could result in the occurrence of serious errors which would be most difficult to diagnose.